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  irfr3505pbfIRFU3505PBF hexfet ? power mosfet s d g v dss = 55v r ds(on) = 0.013 ? i d = 30a  www.irf.com 1 parameter typ. max. units r jc junction-to-case CCC 1.09 r ja junction-to-ambient (pcb mount)  CCC 40 c/w r ja junction-to-ambient CCC 110 thermal resistance this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely low on-resistance persilicon area. additional features of this product are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating. these features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. the d-pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irfu series) is for through-hole mounting applications. power dissipation levels up to 1.5 watts are possible in typical surface mount applications. description advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax lead-free features absolute maximum ratings parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) 71 i d @ t c = 100c continuous drain current, v gs @ 10v (see fig.9) 49 a i d @ t c = 25c continuous drain current, v gs @ 10v (package limited) 30 i dm pulsed drain current   280 p d @t c = 25c power dissipation 140 w linear derating factor 0.92 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy  210 mj e as (tested) single pulse avalanche energy tested value  410 i ar avalanche current  see fig.12a, 12b, 15, 16 a e ar repetitive avalanche energy  mj dv/dt peak diode recovery dv/dt  4.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range c soldering temperature, for 10 seconds 300 (1.6mm from case ) d-pakirfr3505pbf i-pakIRFU3505PBF pd - 95511b downloaded from: http:///

 2 www.irf.com parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 55 CCC CCC v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient CCC 0.057 CCC v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance CCC 0.011 0.013 ? v gs = 10v, i d = 30a  v gs(th) gate threshold voltage 2.0 CCC 4.0 v v ds = 10v, i d = 250a g fs forward transconductance 41 CCC CCC s v ds = 25v, i d = 30a CCC CCC 20 a v ds = 55v, v gs = 0v CCC CCC 250 v ds = 55v, v gs = 0v, t j = 125c gate-to-source forward leakage CCC CCC 200 v gs = 20v gate-to-source reverse leakage CCC CCC -200 na v gs = -20v q g total gate charge CCC 62 93 i d = 30a q gs gate-to-source charge CCC 17 26 nc v ds = 44v q gd gate-to-drain ("miller") charge CCC 22 33 v gs = 10v  t d(on) turn-on delay time CCC 13 CCC v dd = 28v t r rise time CCC 74 CCC i d = 30a t d(off) turn-off delay time CCC 43 CCC r g = 6.8 ? t f fall time CCC 54 CCC v gs = 10v  between lead, CCC CCC 6mm (0.25in.)from package and center of die contact c iss input capacitance CCC 2030 CCC v gs = 0v c oss output capacitance CCC 470 CCC pf v ds = 25v c rss reverse transfer capacitance CCC 91 CCC ? = 1.0mhz, see fig. 5 c oss output capacitance CCC 2600 CCC v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance CCC 330 CCC v gs = 0v, v ds = 44v, ? = 1.0mhz c oss eff. effective output capacitance  CCC 630 CCC v gs = 0v, v ds = 0v to 44v nh electrical characteristics @ t j = 25c (unless otherwise specified) l d internal drain inductance l s internal source inductance CCC CCC s d g i gss ns 

i dss drain-to-source leakage current s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode)  CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.3 v t j = 25c, i s = 30a, v gs = 0v  t rr reverse recovery time CCC 70 105 ns t j = 25c, i f = 30a, v dd = 28v q rr reverse recoverycharge CCC 180 270 nc di/dt = 100a/s   t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 71 280 notes   through  are on page 11 downloaded from: http:///

 www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0. 1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c 0. 1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 175c 4. 0 5. 0 6.0 7. 0 8. 0 9.0 10. 0 v gs , gate-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 20s pulse width    


 
    
     


 
    
  fig 4. typical forward transconductance vs. drain current 0 102030405060708090 i d ,drain-to-source current (a) 0 10 20 30 40 50 60 70 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 25v 20s pulse width downloaded from: http:///

 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-tosource voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec 1 10 100 v ds , drain-to-source voltage (v) 0 1000 2000 3000 4000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 2 04 06 08 01 0 0 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 44v vds= 28v vds= 11v i d = 30a downloaded from: http:///

 www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 i d , d r a i n c u r r e n t ( a ) limited by package 1e-006 1e-005 0. 0001 0. 001 0. 01 0. 1 t 1 , rectangular pulse duration (sec) 0. 001 0. 01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) fig 10. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0. 5 1. 0 1. 5 2. 0 2. 5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 30a v gs = 10v downloaded from: http:///

 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -  fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 1. 6 2. 0 2. 4 2. 8 3. 2 3. 6 4. 0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j )     
 downloaded from: http:///

 www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type.2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse.5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1. 0e-07 1. 0e-06 1. 0e-05 1. 0e-04 1.0e-03 1. 0e-02 1. 0e-01 tav (sec) 0. 1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses. note: in no case should tj be allowed to exceed tjmax 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 40 80 120 160 200 240 e a r , a v a l a n c h e e n e r g y ( m j ) t op single pulse bottom 10% duty cycle i d = 30a downloaded from: http:///

 8 www.irf.com fig 17. 
    

 for n-channel hexfet   power mosfets  !"# ! ? $% " #  ?  "& #  ? $#'(#% " #  #  !)*# p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period    
  + - + + + - - -       ? "+," &&#"-.  ? +#!*#/#! 0  ? %   &&#"-122 ?  0  3#+#0 "##!   v ds 90%10% v gs t d(on) t r t d(off) t f  &!#4"5 1 6! 1 0.1 %          + -  fig 18a. switching time test circuit fig 18b. switching time waveforms downloaded from: http:///

 www.irf.com 9  

  

  
      
   international as se mble d on ww 16, 2001 in t he ass embly line "a" or note: "p" in assembly line position example: lot code 1234 t his is an irfr120 wi t h as s e mb l y i ndi cates "l ead- f r ee" product (optional) p = designate s lead-f ree a = as s e mb l y s i t e cod e part number we e k 1 6 dat e code ye ar 1 = 2001 rect ifier internat ional logo lot code as s e mb l y 34 12 irfr120 116a line a 34 rectifier logo irf r120 12 as s e mb l y lot code year 1 = 2001 dat e code part number week 16 "p" in assembly line position indicates "l ead-f r ee" qual i fi cati on to the cons umer -l evel p = designate s lead-f ree product qualified to t he consumer level (optional) notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ downloaded from: http:///

 10 www.irf.com  
   
      
    
  78 line a logo int ernational rectifier or product (opt ional) p = de s i gn at e s l e ad - f r e e a = assembly site code irfu120 part number week 19 dat e code ye ar 1 = 2001 rectifier international logo as s e mb l y lot code irfu120 56 dat e code part numb er lot code assembly 56 78 ye ar 1 = 2001 we e k 1 9 119a indicates lead-free" as se mble d on ww 19, 2001 in the ass embly line "a" note: "p" in ass embly line pos ition example: wi t h as s e mb l y this is an irfu120 lot code 5678 notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ downloaded from: http:///

 www.irf.com 11 data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 09/2010   repetitive rating; pulse width limited by max. junction temperature. (see fig. 11).   limited by t jmax , starting t j = 25c, l = 0.47mh r g = 25 ? , i as = 30a, v gs =10v. part not recommended for use above this value.  i sd 30a, di/dt 300a/s, v dd v (br)dss , t j 175c  pulse width 1.0ms; duty cycle 2%. 
 c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.  this value determined from sample failure population. 100% tested to this value in production.   when mounted on 1" square pcb (fr-4 or g-10 material) . for recommended footprint and soldering techniques refer to application note #an-994   

    
      
   tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch downloaded from: http:///


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